Solid state electronic control

ABSTRACT

A solid state timing and cycling device utilizing integrated circuits and other discrete solid state components to control the operation of electrically actuated remote control valves for the purpose of automatically programming the operation of all types of systems designed to distribute water for irrigation, spraying, and humidification of plant materials. The control comprises six sections including a digital readout clock circuit, a calendar circuit, an hours memory circuit, a station output board, an internal power supply and an external power output circuit. The internal power supply is common to all sections of the control except power output to the electrically controlled valves in the field and the external power output circuit actuates the electrically operated remote control valves.

United States Patent [191 Church 9 1 SOLID STATE ELECTRONIC CONTROL [76]inventor: James A. Church, 3570 Cortez,

Dallas, Tex. 75220 [22] Filed: May 10, 1973 [21] -Appl. No.: 359,188

[52] US. Cl 58/33, 137/6242, 239/7 D [51] Int. Cl..... G04c 13/06, G04c23/12, E03b 7/07 [58] Field of Search 58/23, 4, 4 A, 24 R, 25,

58/33, 152 R; l37/624.l8, 624.2; 239/6770;

[56] References Cited UNITED STATES PATENTS 3,120,652 2/1964 Weighton eta1 58/145 R 3,234,410 2/1966 Sherman 137/6242 X 3,440,434 4/1969 Yateset al..... 137/624.2 X 3.479.812 11/1969 Kramer 58/23 A X 3.664.1165/1972 Emerson et al.... 58/23 A 3.669.352 6/1972 Zaphiris 239/703.681.914 8/1972 Loewengart 58/24 R 3.721.084 3/1973 Dargent 58/5 OR T14 05 ELEMENT T T cfoa DIVIDE BY SIXTEEN COUNTER AM PM INDICATOR 9BINARYCODED DECIMAL DECODER B4 Mar. 11, 1975 3,732,685 5/1973 Haydon553/26 Primary Examiner-Edith Simmons Jackmon Attorney, Agent, orFirmArthur M. Sloan [5 7] ABSTRACT A solid state timing and cyclingdevice utilizing integrated circuits and other discrete solid statecomponents to control the operation of electrically'actuated remotecontrol valves for the purpose of automatically programming theoperation of all types of systems designed to distribute water forirrigation, spraying, and humidification of plant materials. The controlcomprises six sections including a digital readout clock circuit, acalendar circuit, an hours memory circuit, a station output board, aninternal power supply and an external power output circuit. The internalpower supply is common to all sections of the control except poweroutput to the electrically controlled valves in the field and theexternal power output circuit actuates the electrically operated remotecontrol valves.

36 Claims, 8 Drawing Figures B C G g E C U DE BY c DECADE COUNTER l SIXCOUNTER R COUNTER cc V TE TRANSIST CC SCHMITT TRIGGER DIVIDE EY SIXDIVIDE BY TEN DlVlDE BY TEN DIVIDE BY 51X TRIPLE LINE RECEIVER {QQIENIEUMARI 1 1975 1 SOLID STATE ELECTRONIC CONTROL This invention relates to asolid state timing and cycling device to control operation ofelectrically actuated remote control valves for automaticallyprogramming the operation of all types of systems designed to distributewater for irrigation, spraying, and humidification of plant materials ofall types.

The control device of the invention includes six sections as follows:

I. A digital readout clock circuit including wave shaping and frequencydivision to obtain 1 pulse per minute time base form the line frequency,

2. A calendar circuit which changes day indication each 24 hours,

3. An hours memory circuit which tracks the digital readout. No visualindicators are connected to this circuit,

4. A station output board which contains as many sections as needed tocontrol the irrigation or water distribution system. In the embodimentherein described a five output board is shown for purposes ofillustration. Each section can be set individually for the time desiredfor that station to operate a section of the entire system.

5. An internal power supply which in the embodiment of the inventiondescribed herein supplies volts, regulated plus or minus (1) 0.25 volt,at up to l ampere and is common to all sections of the control exceptpower output to the electrically controlled valves in the field.

6. An external power output circuit for operation or actuation of theelectrically operated remote control valves supplies power throughrelays controlled by the station output board and regulated through theprimary power circuit which may include a suitable transformer and/orrectifier as required for operation of said valves.

Accordingly it is an object of the subject invention to provide animproved solid state electronic irrigation control.

Another object of the subject invention is to provide an improved solidstate timing and cycling device.

Yet another object of the subject invention is to provide a solid statetiming and cycling device which utilizes integrated circuits and otherdiscrete solid state components.

A further object of the subject invention is to provide an improvedsolid state timing and cycling device to control the operation ofelectrically actuated remote control valves.

Still another object of the subject invention is to provide an improvedsolid state timing and cycling device to automatically program theoperation of all types of water distribution systems.

An additional object of the subject invention is to provide an improvedcontrol system for automatically programming the operation ofirrigation, spraying and humidification systems.

Yet a furter object of the subject invention is to provide an improvedsolid state timing and cycling device including six sections.

Another object of the subject invention is to provide an improved solidstate timing and cycling device including a digital readout clockcircuit, a calender circuit, an hours memory circuit, a station outputboard, an internal power supply, and an external power output circuit.

Additional objects, the features and nature of the invention and theadvantages thereof will become apparent by reference to the detaileddescription of illustrated embodiments, the appended claims and theaccompanying drawings, in which:

FIGS. 1, 1A, and IB are a schematic diagram showing an internal powersupply, a digital readout clock circuit, a calendar circuit, and anhours memory circuit in accordance with the invention.

FIG. 2 is a schematic diagram of a data collection gate in accordancewith the invention.

FIG. 3 is a schematic diagram of a five station output board inaccordance with the invention.

FIG. 4 is a schematic diagram of one alternate output board inaccordance with the invention.

FIG. 5 is a schematic diagram of a second alternate output board inaccordance with the invention.

FIG. 6 is a schematic diagram of an external power supply circuit inaccordance with the invention.

Turning to FIG. 1, digital readout clock circuit 1 is shown connected tol4 day calendar circuit 2, 12 hour memory circuit 3, and internal powersupply 4. AM-PM indicator 5 is part of the digital readout clock circuit1.

Sixty Hertz line frequency is fed into one-third of a triple linereceiver 6 such as the triple line receiver numbered 8Tl4 sold bySignetics of 811 East Arques Avenue; Sunnyvale, California; anddescribed on pages I 17 through 180 of Signetics Digital Manual 8000Series TTL/MSI Copyrighted 1971 and showing Signetics code no. D253DlG-0O2-l 1-50M as a triple line receiver designed for applicationsrequiring digital information to be transmitted over long lengths ofcoaxial cable, strip line, or twisted pair transmission lines. TheReceivers high impedance input structurepresents a minimal load to thedriver circuit and allows the transmission line to be terminated in itscharacteristic impedance to minimize line reflections. The built-inhysteresis characteristic of the 8Tl4 also makes it ideal for suchapplications as Schmitt triggers, one-shots and oscillators. Othersuitable devices than the Signetics device described may be used.

The 60 Hertz line frequency is shaped into a square wave by the Schmitttrigger action of the integrated circuit triple line receiver 6. The 60Hertz square wave is then fed into a divide by six 7, through a divideby 10 8, a divide by 10 9, and a divide by six 10 to obtain a total ofdivide by 3600. A 1 pulse per minute output is obtained to be used asthe time base for the clock 1.

Divide by six 7 and divide by six 10 may be the divide by six portion ofa divide by 12 counter/storage element numbered 8288 sold by Signeticsmentioned heretofore and described on pages l33-l38 of Signetics DigitalManual 8000 Series TTL/MSI referred to supra. Divide by 10 8 and divideby 10 9 may be the decade counter numbered 8292 sold by Signeticsmentioned heretofore and described on pages -150 of Signetics DigitalManual 8000 Series TTL/MST referred to supra. Other suitable devicesthan the Signetics devices described above may be used.

The 1 pulse per minute output is fed into the first decade counter 11and the binary coded decimal output is decoded by the binary codeddecimal decoder 12 and drives the seven segment readout 13 for minutesindication.

First decade counter 11 may be Signetics decade counter numbered 8292described supra. Binary coded decimalfdecoder 12 may be the sevensegment decoder numbered 8 T 4.sold by Signetics mentioned heretofo'reand-describedonpages 1'53through 156 of Signetics Digital Manual8000Series TTL/MSI refe-rred to supra. Other suitable devices than theSignetics devices described may be used.

a A.signal generated by the fall of the D output ofthe decade. counter11 is fed into a divide by six counter 14 to obtaintens of minutesindication on the digital readout 85.

The divide by six counter 14 may be Signetics divide by 12counter/storage element numbered 8288, described supra.

The D output of the divide by six 14 generates the signal fed into thesecond decade counter 15 to obtain hours, indication on the readout 87.

The second decade counter 15 may be Signetics decade counter numbered8292 described supra. To obtain tens of hours indication, and unusedflipflop in the tens of minutes counter 15 and a discrete NPN transistor16 are used to turn the B and C seg ments of the fourth readout 17 onand off.

A flip-flop in the second divide by six of the frequency divider chainand two NPN transistors 18 and 19 are used to obtain AM and PMindications on the pilot light indicators 134 and 133 respectively,transistors 18 and 19 beingtriggered by the tens of hours indicator.

Resistor 20 is a base bias resistor for transistor 18 and resistor 21 isa base bias resistor for transistor 19.

When the PM indication changes to AM, a signal is fed to a divide by 16counter 22, and its binary coded decimal output is decoded by a one of16 decoder 23.

Divide by 16 counter 22 may be the binary counter numbered 8293 sold bySignetics mentioned heretofore and described on pages 145-150 ofSignetics Digital Manual 8000 Series TTL/MSI referred to supra. One ofsixteen decoder 23 may be the 4-line to l6-line decoder/demultiplexernumbered N74l54 sold by Signetics mentioned heretofore and described onpages 135 through 136 of Signetics Digital Manual 54/7400 TTLCopyrighted 1971 and showing Signetics code no. D288 DlG-007-8l 50M.Other suitable devices than the Signetics devices described above may beused.

The output of the one of 16 decoder 23 is inverted by one of theinverters 24 through 37 and fed through one of transistor base biasresistors 39 through 51 to the base of one of NPN transistors 52 through65.

Inverters 24 through 37 may be the hex inverters numbered N7404 sold bySignetics mentioned heretofore and described on pages 17 and 18 ofSignetics Digital Manual 54/7400 TTL referred to supra. Other suitabledevices than the Signetics devices described above may be used.

The transistors 52 through 65 which are switching transistors providepower for indicator lights 66 through 79 corresponding to the days ofthe week for the required calendar which is illustrated here as a 2 weekperiod, thus SMTWTF SS MTWTFS for Sunday, Monday, Tuesday, Wednesday,Thursday, Friday, Saturday, Sunday, Monday, Tuesday, Wednesday,Thursday, Friday, Saturday.

The emitter electrodes of transistors 52 through 65 are grounded atground 80.

A signal generated by the fifteenth pulse causes the divide by 16counter 22 to be reset to the first day of the 2 week period.

- The hours memory circuit 3 includes a divide by 12 counter 81 and aone of 16 decoder 82. The divide by 12 counter is shown grounded at 83.

The hours memory circuit 3 divide by 12 counter 81 may. be Signeticsdivide by 12 counter/storage element numbered 8288, described supra. Theone of 16 decoder 82 may be Signetics 4-line to l6-line decoder/-demultiplexer numbered N74l54, described supra. Other suitable devicesthan the Signetics devices described above may be used.

A signal derived from the hours decade counter 15 is fed into the divideby 12 counter 81, and the count advances as indicated on the visualreadout in the clock circuit. Since chip 81 is a divide by 12 counter,it is automatically reset after the count of 12, but to insuresynchronism with the clock readout, the divide by 12 counter 81 receivesthe same data pulse that resets the clock read out to 1:00 oclock. Thisdata signal is generated twice in 24 hours.

Binary coded decimal decoders 84 and 86 are equivalent to binary codeddecimal decoder 12 and perform in the same manner as binary codeddecimal decoder 12. Signetics seven segment decoder 8T04 described suprain regards to binary coded decimal decoder 12' may also be used forbinary coded decimal decoders 84 and 86.

Seven segment readouts and 87 are equivalent to seven segment readout13.

The binary coded decimal decoder 84 is grounded by ground 88.

Resistor 89 is a base bias resistor for the base of discrete transistor16 which is grounded at ground 90.

Schmitt trigger 91 is a monostable multivibrator which acts as a datapulse generator to reset the divide by six counter integrated circuit14, the second decade counter integrated circuit 15, and the divide by12 counter 81 of the 12 hour memory circuit 3.

Schmitt trigger 91 may be the monostable multivibrator numbered N7412lsold by Signetics mentioned heretofore and described on pages 1 15through 1 18 of Signetics Digital Manual 54/7400 TTL described supra.Other suitable devices than the Signetics device described above may beused.

Schmitt trigger 91 is grounded at 92. Resistor 94 and capacitor 93comprise an RC circuit to determine pulse length.

The designation Vcc where it occurs, signifies the positive voltage,typically 5 volts plus or minus 0.25 volts as indicated above.

Diode 95 which is a rectifier to block current and resistor 96 togetherform a wave shaping circuit network.

Capacitor 97 is a high frequency bypass capacitor which is grounded atground 98. Typically capacitor 97 may have a value of 0.01 micro farads;however, a suitable capacitor of any appropriate value may be utilized.

Resistor 99 brings the AC from the transformer sec ondary winding 124 tothe triple line receiver 6 which is a wave shaping circuit.

Capacitor 100 is a bypass capacitor which is grounded at ground 101.

Triple line receiver 6 is connected to ground at 102 and 103. Divide bysix counter 14 is grounded at 104. Second decade counter 15 is groundedat 105. Divide by six 7 is grounded at 106. Divide by 10 8 and divide by10 9 are grounded at 107 and 108 respectively. Divide by six 10 isgrounded at 109.

Divide by 16 counter 22 is grounded at 110.

The AM-PM indicator is grounded at 111.

Capacitor 112 is a bypass capacitor which is connected to ground 113.

First decade counter 11 is grounded at 114.

Wiper or switch arm 115 and switch contacts 116, 117, 118, 119, and 120together comprise a one pole five position make before break timesetting switch in which as wiper arm 115 is advanced to the right itpicks up faster pulses which allows for rapid time setting. Contact 116gives 1 pulse per minute, contact 117 gives 6 pulses per minute, contact118 gives 60 pulses per minute, contact 119 gives 600 pulses per minute,and contact 120 gives 3,600 pulses per minute.

Power source 121 typically may supply 120 volts AC at 50-60 Hertz.Switch 122 may be opened to disconnect the power source 121.

Coils 123 and 124 are the primary and secondary windings respectively ofa transformer which has a core 125. The secondary winding 124 isgrounded to ground 126.

Diodes 127 and 128 are rectifiers to convert AC current to pulsed DCcurrent.

Capacitor 129 is a filter capacitor which is grounded at 130.

Voltage regulator 131 may be the linear integrated circuit manufacturedunder the number LM309 by Signetics mentioned heretofore and describedon page 93 of Signetics Linear Data Book, Volume 1, Copyrighted 1971.Voltage regulator 131 is grounded at ground 132.

PM pilot light 133 and AM pilot light 134 were indicated above indiscussion of the AM-PM indicator circuit 5.

Diodes 135 and 136 are rectifiers for current limitation.

Turning to FIG. 2 switches 146, 147, 148, and 149 are shown connected tooutput pins 1, 2, 11, and 12 of the one of 16 decoder 82 of the 12 hourmemory circuit 3. Switches 146, 147, 148, and 149 make and break contactwith the three input NOR gate 162 through isolation diodes 155, 156,157, and 158, respectively. Switches and diodes similar to switches 146,147, 148, and 149 and diodes 155, 156, 157, and 158 connect anddisconnect output pins 3 through of one of 16 decoder 82 to three inputgate 162 as indicated by dashed lines in FIG. 2.

Isolation diode 159 is connected between the collector electrode oftransistor 52 and pilot light 66 of the 14 day calendar circuit 2.Likewise isolation diode 160 is connected between the collectorelectrode of transistor 53 and pilot light 67; isolation diode 161 isconnected between the collector electrode of transistor 64 and pilotlight 78; and isolation diode 162 is connected between the collectorelectrode of transistor 65 and pilot light 79.

Switches 150, 151, 152, and 153 connect and disconnect the output fromthe 14 day calender circuit 2 to the three input NOR gate 162. Switchessimilar to switches 150, 151, 152, and 153 connect transistor 54 through63 to the three input NOR gate 162 through isolation diodes similar todiodes 159, 160, 161, and 162 as indicated by dashed lines in FIG. 2.

Single pole double throw switch 145 connects the AM-PM indicator circuit5 to the three input NOR gate 162. As noted above, the base biasresistor 21 is connected to the flip-flop in the second divide by sixl0.

Three input NOR gate 162 may be the triple 3- input NOR gatemanufactured by Signetics mentioned heretofore under the number 8875 anddescribed on pages 2-24 and 2-25 of Signetics Digital Designers ChoiceLogic Specifications Handbook Vol. 1 Logic Elements SS1 8400/8800TTL/DTL, Copyrighted 1971.

As noted, the three inputs A, B, and C to the three input NOR gate 162come respectively from the 12 hour membory circuit 3, the 14 daycalender circuit 2, and the AM-PM indicator circuit 5 which is part ofthe clock circuit 1.

The output from the three input NOR" gate 162 passes through the diode364 which prevents reverse current flow to the Schmitt trigger 154 whichis the trigger input on the output sequence board as shown in FIGS. 3,4, and 5.

Schmitt trigger 154 may be the Signetics monostable multivibratornumbered N74l2l as indicated in regard to Schmitt trigger 91.

Turning to FIG. 3, one embodiment of the five station output or sequenceboard is shown.

As noted, by closing appropriate switches 145, 146, 147, 148, 149, 150,151, 152, and 153 in the AM-PM indicator circuit 5, the hours memorycircuit 3, and the calender circuit 2, data is fed to the three inputgate 162. When all 3 inputs to the gate 162 are low, an output signal issent to the output board where a pulse is generated to start the firstsection of the output board on its timed output to the valves in thefield.

The output board includes Schmitt trigger 154 and X numberof individualtimers 175, 176, 177, 178, and 179 which are connected sequentially.When the first section has timed out, it shuts down and automaticallystarts the next section 176 on time. This action continues through allsections at which time the last section shuts down until the next pulsefrom the clock circuit 1 is received.

Provision has been made to skip alternate sections 175, 177, and 179 or176 and 178 and shutdown or retrigger the alternate sections at once orafter a timed delay. The output can be started manually if need be. Asingle section can be manually selected and timed or can be timedautomatically. All automatic timing is adjustable from /2 second upwardas required for the appropriate program.

Turning to the five station output board shown in FIG. 3 the sequentialtimers or stations 175, 176, 177, 178, and 179 may be linear integratedcircuit monolithic timing circuits such as Signetics timer number NE555Vdescribed on pages 177 and 178 of Signetics Linear Data Book Volume I,Copyrighted 1972. Other suitable devices than Signetics NE555V may beused.

The three input data collection gate 162 is shown providing a signalthrough diode 364 and Schmitt trigger 154 to timer 175. The 12 hourdata, 14 hour data, and AM-PM data inputs to the data collection gate162 are shown in the data collection schematic of FIG. 2.

Trimmer resistors 180, 181, 182, 183, and 184 adjust the on time tocompensate for tolerances in the resis tance and capacitance of theirrelated RC circuits. Trimmer resistor is part of the RC circuitincluding timing resistor 185 and capacitor which is grounded at ground195. Trimmer resistor 181 is part of the RC circuit including timingresistor 186 and capacitor 191 which is grounded at ground 196. Trimmerresistor 182 is part of the RC circuit including timing resistor [87 andcapacitor 192 which. is grounded at ground 1'97. Trimmer'resistor 183 ispart of the RCcircuit including timing resistor 188 and capacitor 193whichis grounded. at ground 198. Trimmer resistor 184 is par-t of the RCcircuit including timing resistor 189 and capacitor 194 which isgrounded at ground 199.

Resistors 200,201, 202, and 203 are input bias resistors.

Capacitors 204, 205, 206, 207, and 208 are voltage level referencecapacitors which are grounded respectively at grounds 214, 216, 218,220, and 222.

Capacitors 209, 210, 211, and 212 are isolation or coupling capacitors.

Timers 175, 176, 177, 178, and 179 are grounded respectively at grounds213, 215, 217, 219, and 221.

Resistor 223 and capacitor 224 comprise a RC circuit to determine thelength of pulse the Schmitt trigger 154 generates. Schmitt trigger 154is grounded at ground 225.

NPN transistors 226, 227, 228, 229, and 230 are relay switchingtransistors.

Resistors 231, 232, 233, 234, and 235 are transistor base bias resistorsfor transistors 226, 227, 228, 229, and 230 respectively.

The base electrodes of transistors 23], 232, 233, 234, and 235 areconnected respectively to switch points 236, 237, 238, 239, and 240 of asingle station select switch including swtich element or wiper 286.

Relay coils 241, 242, 243, 244, and 245 are connected to the emitterelectrodes of transistors 231, 232,

233, 234, 235 respectively. Relay contacts 246, 247, 248, 249, and 250are activated by their associated relay coils 241, 242, 243, 244, and245. Relay coil 241 is grounded at ground 251; relay coil 242 isgrounded at ground 252; relay coil 243 is grounded at ground 253; relaycoil 244 is grounded at ground 254, and relay coil 245 is grounded atground 255.

Pilot light 266, 267, 268, 269, and 270 are connected in parallel withrelay coils 241, 242, 243, 244, and 245 respectively.

Switch 256 isan on-off-on single pole double throw switch to apply powerdirectly to the base of Transistors 226', 227, 228, 229 or 230 throughswitch 272 and resistor 257 or from Timer 258 for single station manualoperation. The timer 258 may be a Signetics timer number NESSSV asdescribed above.

Resistor 257 is a base bias resistor.

Timer 258 is grounded at ground 259.

Push button switch 260 is a timed on switch, i.e. pushing the buttonstarts the timer 258 on time delay. Switch 260 is grounded at ground261.

Capacitor 263 is a timing capacitor and variable resistor 264 is atiming resistor which together form an RC circuit.

Capacitor 262 is a voltage level reference capacitor. Capacitors 262 and263 are grounded at ground 265.

Timer 258 is a single station timer for picking out one station andhaving it timed.

Capacitor 271 is a coupling capacitor.

Turning to FIG. 6 the external power supply circuit is shown. Valves280, 281, 282, 283, and 284 are connected to relay contacts 246, 247,248, 249, and 250 as shown. Valves 280, 281, 282, 283, and 284 arevalves in the field.

External power supply 285 matches the valves in the field 280, 281, 282,283, and 284 and is connected to relay coils 241, 242, 243, 244, and245.

The positive voltage is indicated by Vcc as heretofore.

Turning to FIG. 4 one alternate five station out put board that may beused with the subject invention is shown.

The alternate output board of FIG. 4 includes a Schmitt trigger input154 and X number of individual timers connected sequentially.

When a signal is transmitted from the three input gate 162 through thediode 364 and Schmitt trigger 154, the Schmitt trigger 154 is activatedand generates an output pulse which starts the timer 300 for the firststation. The first station 300 will time out according to the length oftime set up in the program and shutdown simultaneously starting thesecond timer or section 301 on time according to the program. Thisaction will continue through the stations or timers 302, 303, and 304 atwhichtime the system will shut down until the next signal is transmittedfrom the clock and calendar board of FIGS. 1, 1A, and 1B through theSchmitt trigger 154.

An alternate program can be set up whereby alternate stations or timerscan be skipped if desired.

When switch 305 which is a double pole double throw center off switch isin the lower or odd number position for example, NPN transistors 307 and309 are turned on, bypassing timing resistors 312 and 314. A pulsegenerated by the Schmitt trigger 154 will start the first station 300 onthe programmed time. At the end of the time period, the first station300 will shut down and trigger the second station 301. Since timingresistor 312 is bypassed by transistor 307, the second station 301 willshutdown and trigger the third station or timer 302 typically about /2second after start.

The third staion 302 will time out according to the time setting forthat station, triggering the fourth station or timer 303 on shutdown.NPN transistor 309 is turned on, bypassing timing resistor 314,causingthe fourth station 303 to skip to the fifth station or timer 304which will time out according to the programmed time.

On shutdown of the fifth station 304, the pulse generated will causeflip-flop 316 to change state, reversing the on/off condition of NPNtransistors 306,307, 308, 309, and 310. The next pulse generated by theSchmitt trigger 154 will start the first station 300 and transistor 306is turned on, bypassing timing resistor 311 and causing the firststation 300 to skip to the second station 301 which will time outaccording to the programmed time.

Shutdown of the second station 301 will trigger the third station'ortimer 302 which will skip due to the on condition or transistor 308 andwill start the fourth timer or station 303.

Upon shutdown of the fourth station 303, the fifth station 304 istriggered on and will shutdown typically about one-half second later,generating a pulse which will cause flip-flop 316 to change back to theoriginal state, and the system will be shutdown until the next signalfrom the clock and calender board of FIGS. 1, 1A, and 18 through theSchmitt trigger 154.

When switch 305 is in the upper or even number position, the opposite oralternate transistors are turned on, i.e. transistors 306, 308, and 310instead of transistors 307 and 309.

Timing resistors 313 and 315 serve the same function as timing resistors311, 312, and 314 mentioned above.

If desired, retriggering of the output board of FIG. 4 can beaccomplished by closing switch 317 which activates the retrigger timer365. The transfer pulse generated by the shutdown of the first station300 will start the retrigger time delay which will range ordinarily from/2 second to 50 minutes. Retriggering times longer than 60 minutes willbe accomplished by the clock and calendar circuits of FIGS. 1, 1A and 1Bwhich can trigger each hour.

Timers 300, 301, 302, 303, and 304 may be Signetics timers number NE555Vdescribed above in regards to timers 175, 176, 177, 178, and 179.

Referring further to FIG. 4 resistors 318, 319, 320, 321, and 322 andtransistor base bias resistors for transistors 306, 307, 308, 309, and310.

Resistors 323, 324, 325, 326, and 327 are trimmer resistors to adjustthe on time to compensate for tolerance in the resistors and capacitorsin their respective RC circuits. Resistor 323 forms an RC circuit withresistor 31 1 and capacitor 328. Resistor 324 forms an RC circuit withresistor 312 and capacitor 329. Resistor 325 forms an RC circuit withresistor 313 and capacitor 330. Resistor 326 forms an RC circuit withresistor 314 and capacitor 331. Resistor 327 forms a .RC circuit withresistor 315 and capacitor 332.

Capacitors 328, 329, 330, 331, and 332 are grounded at grounds 333, 334,335, 336, and 337 respectively.

Capacitors 338, 339, 340, and 342 are voltage level reference capacitorswhich are grounded respectively at grounds 343, 344, 345, 346, and 347.

Resistors 348, 349, 350, and 351 are input bias resistors.

Capacitors 352, 353, 354, 355, 356, and 357 are iso' lation or couplingcapacitors.

Resistors 358, 359, 360, 361, and 362 are transistor base bias resistorsfor transistors 226, 227, 228, 229, and 230.

Switch 363 is a manual start push button switch. The operation of thealternate output board circuit of FIG. 4 can be commenced by pushing thebutton on switch 363 independently of the signal from the clock andcalendar board circuit of FIGS. 1, 1A, andlB, and thus the clock andcalendar board circuit of FIGS. 1, 1A, and 1B can be bypassed.

Capacitor 366 is a timing capacitor which forms a RC circuit with timingresistor 368.

Capacitor 367 is a voltage level reference capacitor.

Capacitors 369 and 370 are coupling capacitors.

Block 371 indicates external modular timing boards to increase thecapacity of the system beyond five timers or stations such as stations300, 301, 302, 303, and 304.

Resistor 372 is a base bias resistor.

Switch 373 which is a manual on switch is activated to apply power tothe base of Transistors 226, 227, 228, 229, or 230 for picking out onestation through contacts 236, 237, 238, 239, or 240 of switch 272.

Diode 374 prevents reverse current flow.

Push button switch 375 when activated by pushing starts the timer 377 ontime delay. Timer 377 may be Signetics timer number NESSSV describedabove. The switch 375 is connected to ground 376.

Timing capacitor 380 and timing resistor 378 together form an RCcircuit.

Capacitor 379 is a voltage level reference capacitor.

Capacitors 379 and 380 are connected to ground 381.

F lip-flop 316 may be Signetics Dual J -K Master-Slave Flip-Flop Digital54/74TTL Series number 7473 described on pages 77 and 78 of SigneticsDigital Manual 54/7400 TTL. Flip-Flop 316 is grounded at ground 382.

The trigger pluse starts the first section of the modular board 371.

Vcc indicates the positive voltage.

Switch element or wiper 286 along with switch contacts 236, 237, 238,239, and 240 and circuit elements 372 through 381 constitutes anindependent overriding circuit to operate one station and doesntinterfere with the program.

Turning to FIG. 5 a second five station alternate outboard circuit isshown. In so far as operation differs from FIGS. 3 and 4 it will bediscussed.

Retrigger pulses are derived from and injected into first station ortimer 300 in FIG. 4. However in the alternate output board of FIG. 5pulses can be derived from any station and injected into any station,according to the program.

The start of the output board of. FIG. 5 at any station can beaccomplished by selecting the starting station through switch 430 andpushing push button switch 436. The output will then be as programmedfrom that station, retriggering if desired.

Switch 430 is used to inject retrigger pulses into any station selectedeither at once or after a timed delay. First station or timer 425 isselected by switch position 431. Second station or timer 426 is selectedby switch position 432. Third station or timer 427 is selected by switchposition 433. Fourth station or timer 428 is selected by switch position434. Fifth station or timer 429 is selected by switch position 435.

Timers 425, 426, 427, 428, and 429 may be Signetics timers number NESSSVdescribed above in regards to timers 175, 176, 177, 178, and 179 et seq.

Push button switch 436 which is used to start the output manually at theselected station is grounded at ground 437.

Capacitors 438, 439, 440, 441, 442, 443, and 271 are couplingcapacitors.

The Schmitt trigger 154 provides the impulse or start pulse for normaloperation.

Switch 444 is used to pick up the trigger pulse from any station byselecting desired switch contact 445, 446, 447, 448, 449, or 450 byadjustment of switch wiper blade or element 451.

The retrigger timer 452 may be Signetics timer number NESSSV describedabove.

The other elements shown in FIG. 5 are described in the description ofFIGS. 3 and 4.

In summary the solid state controller of the subject invention may beconstructed with output voltage to match valves in the field or otherdevices as required. The number of stations is unlimited with auxiliaryplug in modular output'sections. The auxiliary output sections-neednotbe located at the main controller site.

A l.4,day calendar may beutilized with a 12 hour electronic clock andthe AM-PM circuit may be bypassed to repeat cycle for both AM and PMhours.

Variable-timing typically from /2 second to one hour per station isprovided at each station and one or more auxiliary output sections canbe triggered simultaneously or allowed to run sequentially.

Alternate cycles are utilized to skip alternate stations. The repeatcycle feature will pick up skipped stations with predetermined timedelay, typically up to one hour. The repeat feature need not be used asthe next clock pulse will pick up skipped stations. The circuit willautomatically return to the initial state.

The repeat cycle feature can be triggered from any station, and therepeat start pulse can be applied to any station, ahead of, or behindthe triggering station.

Any one or all stations can be turned on manually simultaneously or byseparate push button controlled timer, independent of the programmedsetup.

Since the internal power supply includes a transformer, no high voltageis present past the power supply, and the power source is isolated fromthe internal circuitry. The indicator lamps and digital readoutsindicate the circuits in operation.

The output, master valve, and pump circuits may be protected by circuitbreakers.

It is thought that this invention and many of its attendant advantageswill be understood from the foregoing description, and it will beapparent that various changes may be made in the form, construction andarrangement of the parts without departing from the spirit and scope ofthe invention or sacrificing all of its material advantages, the formshereinbefore described being merely preferred embodiments thereof.

What I claim as my invention and desire to secure by letters patent ofThe United States ls:

l. A solid state electronic control for timing and cycling includingintegrated circuits for timing and frequency division, discretetransistors, solid state diodes, light emitting diode numericindicators, resistors and capacitors, and an internal power supplyincluding an alternating current source wherein the integrated circuitsdrive the discrete transistors to control the light emitting diodenumeric indicators for time indication, the solid state diode rectifyalternating current from the alternating current source to directcurrent, the resistors limit current, and the capacitors effectfiltering and transient suppression to automatically, sequentially timeand cycle the actuation of electrically operated remote control valvesfor distribution of water for the purpose of irrigation, spraying, andhumidification of plant materials, said solid state electronic controlcomprising six sections including a digital readout clock circuit, acalendar circuit, an hours memory circuit, a station output board, theinternal power supply, and an external power output circuit in which thedigital readout clock circuit is connected to the calendar circuit, thehours memory circuit, and the internal power supply, the station outputboard is connected to the calendar circuit, the hours memory circuit,and the digital readout clock circuit, and the external power outputcircuit is connected to the station output board and adapted forconnection to remote control valves so that the digital readout clockcircuit indicates the hours of a time period and then repeats, thecalendar circuit changes indication each 24 hours, indicating days ofthe week, the hours memory circuit tracks the digital readout, theinternal power supply is common to all sections of the control exceptpower output to remote control valves, startup of the station outputboard is dependent on coincidence of signals obtained from the digitalreadout clock circuit, the calendar circuit, and the hours memorycircuit, and the external power output circuit supplies power to operateremote control valves. 7

2. A solid state electronic control as described in claim 1 in which thedigital readout clockcircuit includes an AM-PM indicator circuit.

3. A solid state electronic control as described in claim 2 in which theinternal power supply is common to all sections of the control exceptthe power output to the electrically operated remote control valves andthe external power output circuit actuates the electrically operatedremote control valves.

4. A solid state electronic control as described in claim 3 in which theinternal power supply includes a source of power, a transformer, and avoltage regulator in which the transformer isolates the source of powerfrom the other sections of the control and the transformer secondarywinding is connected to the voltage regulator.

5. A solid state control as described in claim 4 in which the internalpower supply includes two diodes and a filter capacitor in which onediode is connected in each arm of the transformer secondary winding, thefilter capacitor is connected between the diodes and the voltageregulator, and the transformer secondary winding and filter capacitorare grounded.

6. A solid state control as described in claim 4 in which the digitalreadout clock circuit includes wave shaping and frequency division meansto obtain a pulse time base from the line frequency and digital readoutmeans.

7. A solid state control as described in claim 6 in which the waveshaping means includes a triple line receiver connected to the secondarywinding of the internal power supply transformer.

8. A solid state control as described in claim 7 in which the frequencydivision means includes first and second divide by six means, first andsecond divide by 10 means, first and second decade counter means,Schmitt trigger means, divide by six counter means, and multiple binarycoded decimal decoder means in which the triple line receiver is'connected to the Schmitt trigger means, to the second decade countermeans, to at least one of the binary coded decimal decoder means, to thefirst and the second divide by six means, and to the divide by sixcounter means, the

Schmitt trigger means is connected to the divide by six counter meansand the second decade counter means, the first divide by six means isconnected to the first divide by 10 means, the first divide by 10 meansis connected to the second divide by 10 means, the second divide by 10means is connected to the second divide by six means, the second decadecounter is connected to the divide by six counter and to a binary codeddecimal decoder means, and the divide by six counter is connected to thefirst decade counter means and to multiple binary coded decimal decodermeans so that the line frequency is shaped into a square wave by theSchmitt trigger action of the triple line receiver and is fed throughthe first divide by six to the first divide by 13 v 10, to the seconddivide by 10, to the second divide by six for atotaldividc by 3600 toobtaina 1 pulse per minute output as a time base for the digital readoutclock circuit which is fed to the first decade counter whose output isdecoded by a binary codeddecimal decoder means,.a signal from the firstdecade counter being fed into-the divide by six counter means whoseoutput is decodedby a binary coded decimal decoder means, a signal fromthe divide by six counter being fed into the second decade counter whoseoutput is decoded by a binary coded decimal decoder means, the Schmitttrigger acting as a data pulse generator to reset the divide by sixcounter and second decade counter.

9. A solid state electronic control as described in claim 8 includingfour digital readout means, one for minutes indication, one for tens ofminutes indication, one for hours indication, and one for tens of hoursindication.

10. A solid state electronic control as described in claim 9 in whichthe digital readout means for tens of hours indication includes B and Csegments including transistor and flip flop means to turn the B and Csegments of the digital readout means for tens of hours indication onand off.

11. A solid state electronic control as described in claim 8 in whichthe AM-PM indicator circuit includes flip flop means in the frequencydivision means, two NPN transistors, and pilot light indicator means.

12. A solid state electronic control as described in claim 11 in whichthe hours memory circuit tracks the digital readout means and includesdivide by 12 counter means and one of 16 decoder means in which thedivide by 12 counter means receives a signal from the decade countermeans of the digital readout clock circuit.

13. A solid state electronic control as described in claim 12 in whichthe calendar circuit changes day indication each 24 hours includingdivide by 16 counter means, one of 16 decoder means, multiple invertermeans, multiple solid state switching means, and multiple pilot lightindicator means in which the divide by 16 counter means is connected tothe second divide by six means of the frequency division means, to theAM-PM indicator circuit flip flop means and to the base electrode of oneof the two AM-PM indicator circuit transistors whose collector electrodeis connected to one of the two pilot light indicator means whosefunction is to indicate PM, the one of 16 decoder means is connected tothe divide by sixteen counter means and to the multiple inverter means,the multiple inverter means is connected to the multiple solid stateswitching means, and the multiple solid state switching means isconnected to the multiple pilot light indicator means so that the divideby 16 counter means counts the passage of 24 hours, and the binary codedoutput of the divide by 16 counter means is decoded by the one of 16decoder means and is inverted by the inverter means and fed to the solidstate switching means which activate associated pilot light indicatormeans to indicate days of the week.

14. A solid state electronic control as described in claim 13 in whichthe calendar circuit divide by 16 counter is connected to the calendarcircuit one of 16 decoder, the one of 16 decoder is connected betweenthe divide by 16 counter and the inverter means, and the multiple solidstate switching means are connected between the inverter means and thepilot light indicator means.

15. A solid state electronic control as described in claim 14 includingswitch means connected to the digital readout clock circuit frequencydivision means said switch means being adjustable to pick up fasterpulses allowing for rapid time setting.

16. A solid state electronic control as described in claim 15 includingdata collection means for collecting data from the hours memory circuit,the calendar circuit, and the AM-PM indicator circuit and transmittingthat data to the station output board.

17. A solid state electronic control as described in claim 16 in whichthe data collection means is a threeinput NOR gate.

18. A solid state electronic control as described in claim 17 includingswitching means between the threeinput NOR gate and each of its datainputs.

19. A solid state electronic control as described in claim 17 in whichthe station output board includes trigger input means connected to theoutput of the three-input NOR gate and a number of solid statesequential timers connected to the trigger input means.

20. A solid state electronic control as described in claim 19 in whichthe trigger input means is a Schmitt trigger.

21. A solid state electronic control as described in claim 20 includingrectifier means connected between the output from the three-input NORgateand the Schmitt trigger to prevent reverse flow of current.

22. A solid state electronic control as described in claim 21 includingRC circuit means connected to each sequential timer and trimmer resistormeans connected between each sequential timer and its related RC circuitto adjust the on time to compensate for tolerances in the resistance andcapacitance of their related RC circuits.

23. A solid state electronic control as described in claim 22 includingmultiple relay switching transistor means and multiple relay means inwhich the relay switching transistor means are connected between thesequential timers and the coils of the relay means.

24. A solid state electronic control as described in claim 23 in whichthe external power output circuit includes an external power supply andin which the external power supply is connected to one set of the relaycontacts.

25. A solid state electronic control as described in claim 24 includingexternal field valves connected be-- tween the external power supply andother relay contacts.

26. A solid state electronic control as described in claim 25 includingswitching means and solid state timer means in which the switching meansis adjustable to connect the solid state timer with a selected one ofthe solid state sequential timers to have said sequential timer timed.

27. A solid state electronic control as described in claim 26 includinga second switching means to apply power to the timer and a thirdswitching means to start the timer on time delay.

28. A solid state electronic control as described in claim 27 includingmeans for bypassing the output of the three-input NOR gate andtriggering the Schmitt trigger directly.

29. A solid state electronic control as described in claim 28 includingretriggering means connected to the first sequential timer and switchmeans connected between the retriggering means and the positive voltagewhereby closing the switch means activates the retrigger means and thetransfer pulse generated by the shutdown of the first sequential timerwill start the retriggering time delay.

30. A solid state electronic control as described in claim 29 in whichthe retriggering means is a solid state electronic timer.

31. A solid state electronic control as described in claim 29 includingmeans for skipping selected alternate sequential timers.

32. A solid state electronic control as described in claim 31 in whichthe means for skipping selected alternate sequential timers includes asolid state flip flop, a number of NPN transistors, one connected toeach sequential timer, and switching means connected between the flipflop and NPN transistors.

33. A solid state electronic control as described in claim 32 includingexternal modular timing boards to increase the capacity of the stationoutput board by adding additional sequential timer stations, saidexternal modular timing boards being connected to the means for skippingselected alternate sequential timers.

34. A solid state electronic control as described in claim 25 includingfirst switching means, second switching means, and retrigger means inwhich the first switching means is adjustable to connect the retriggermeans with a selected one of the solid state sequential timers to pickup trigger pulses from the selected sequential timer, the retriggermeans is connected between the first and the second switching means andthe second switching means injects retrigger pulses into the selectedsequential timer.

35. A solid state electronic control as described in claim 34 includingmanual switch means connected to the second switching means to start theoutput manually at any sequential timer station.

36. A solid state electronic control as described in claim 34 in whichthe retrigger means is a solid state

1. A solid state electronic control for timing and cycling includingintegrated circuits for timing and frequency division, discretetransistors, solid state diodes, light emitting diode numericindicators, resistors and capacitors, and an internal power supplyincluding an alternating current source wherein the integrated circuitsdrive the discrete transistors to control the light emitting diodenumeric indicators for time indication, the solid state diode rectifyalternating current from the alternating current source to directcurrent, the resistors limit current, and the capacitors effectfiltering and transient suppression to automatically, sequentially timeand cycle the actuation of electrically operated remote control valvesfor distribution of water for the purpose of irrigation, spraying, andhumidification of plant materials, said solid state electronic controlcomprising six sections including a digital readout clock circuit, acalendar circuit, an hours memory circuit, a station output board, theinternal power supply, and an external power output circuit in which thedigital readout clock circuit is connected to the calendar circuit, thehours memory circuit, and the internal power supply, the station outputboard is connected to the calendar circuit, the hours memory circuit,and the digital readout clock circuit, and the external power outputcircuit is connected to the station output board and adapted forconnection to remote control valves so that the digital readout clockcircuit indicates the hours of a time period and then repeats, thecalendar circuit changes indication each 24 hours, indicating days ofthe week, the hours memory circuit tracks the digital readout, theinternal power supply is common to all sections of the control exceptpower output to remote control valves, startup of the station outputboard is dependent on coincidence of signals obtained from the digitalreadout clock circuit, the calendar circuit, and the hours memorycircuit, and the external power output circuit supplies power to operateremote control valves.
 1. A solid state electronic control for timingand cycling including integrated circuits for timing and frequencydivision, discrete transistors, solid state diodes, light emitting diodenumeric indicators, resistors and capacitors, and an internal powersupply including an alternating current source wherein the integratedcircuits drive the discrete transistors to control the light emittingdiode numeric indicators for time indication, the solid state dioderectify alternating current from the alternating current source todirect current, the resistors limit current, and the capacitors effectfiltering and transient suppression to automatically, sequentially timeand cycle the actuation of electrically operated remote control valvesfor distribution of water for the purpose of irrigation, spraying, andhumidification of plant materials, said solid state electronic controlcomprising six sections including a digital readout clock circuit, acalendar circuit, an hours memory circuit, a station output board, theinternal power supply, and an external power output circuit in which thedigital readout clock circuit is connected to the calendar circuit, thehours memory circuit, and the internal power supply, the station outputboard is connected to the calendar circuit, the hours memory circuit,and the digital readout clock circuit, and the external power outputcircuit is connected to the station output board and adapted forconnection to remote control valves so that the digital readout clockcircuit indicates the hours of a time period and then repeats, thecalendar circuit changes indication each 24 hours, indicating days ofthe week, the hours memory circuit tracks the digital readout, theinternal power supply is common to all sections of the control exceptpower output to remote control valves, startup of the station outputboard is dependent on coincidence of signals obtained from the digitalreadout clock circuit, the calendar circuit, and the hours memorycircuit, and the external power output circuit supplies power to operateremote control valves.
 2. A solid state electronic control as describedin claim 1 in which the digital readout clockcircuit includes an AM-PMindicator circuit.
 3. A solid state electronic control as described inclaim 2 in which the internal power supply is common to all sections ofthe control except the power output to the electrically operated remotecontrol valves and the external power output circuit actuates theelectrically operated remote control valves.
 4. A solid state electroniccontrol as described in claim 3 in which the internal power supplyincludes a source of power, a transformer, and a voltage regulator inwhich the transformer isolates the source of power from the othersections of the control and the transformer secondary winding isconnected to the voltage regulator.
 5. A solid state control asdescribed in claim 4 in which the internal power supply includes twodiodes and a filter capacitor in which one diode is connected in eacharm of the transformer secondary winding, the filter capacitor isconnected between the diodes and the voltage regulator, and thetransformer secondary winding and filter capacitor are grounded.
 6. Asolid state control as described in claim 4 in which the digital readoutclock circuit includes wave shaping and frequency division means toobtain a pulse time base from the line frequency and digital readoutmeans.
 7. A solid state control as described in claim 6 in which thewave shaping means includes a triple line receiver connected to thesecondary winding of the internal power supply transformer.
 8. A solidstate control as described in claim 7 in which the frequency divisionmeans includes first and second divide by six means, first and seconddivide by 10 means, first and second decade counter means, Schmitttrigger means, divide by six counter means, and multiple binary codeddecimal decoder means in which the triple line receiver is connected tothe Schmitt trigger means, to the second decade counter means, to atleast one of the binary coded decimal decoder means, to the first andthe second divide by six means, and to the divide by six counter means,the Schmitt trigger means is connected to the divide by six countermeans and the second decade counter means, the first divide by six meansis connected to the first divide by 10 means, the first divide by 10means is connected to the second divide by 10 means, the second divideby 10 means is connected to the second divide by six means, the seconddecade counter is connected to the divide by six counter and to a binarycoded decimal decoder means, and the divide by six counter is connectedto the first decade counter means and to multiple binary coded decimaldecoder means so that the line frequency is shaped into a square wave bythe Schmitt trigger action of the triple line receiver and is fedthrough the first divide by six to the first divide by 10, to the seconddivide by 10, to the second divide by six for a total divide by 3600 toobtain a 1 pulse per minute output as a time base for the digitalreadout clock circuit which is fed to the first decade counter whoseoutput is decoded by a binary coded decimal decoder means, a signal fromthe first decade counter being fed into the divide by six counter meanswhose output is decoded by a binary coded decimal decoder means, asignal from the divide by six counter being fed into the second decadecounter whose output is decoded by a binary coded decimal decoder means,the Schmitt trigger acting as a data pulse generator to reset the divideby six counter and second decade counter.
 9. A solid state electroniccontrol as described in claim 8 including four digital readout means,one for minutes indication, one for tens of minutes indication, one forhours indication, and one for tens of hours indication.
 10. A solidstate electronic control as described in claim 9 in which the digitalreadout means for tens of hours indication includes B and C segmentsincluding transistor and flip flop means to turn the B and C segments ofthe digital readout means for tens of hours indication on and off.
 11. Asolid state electronic control as described in claim 8 in which theAM-PM indicator circuit includes flip flop means in the frequencydivision means, two NPN transistors, and pilot light indicator means.12. A solid state electronic control as described in claim 11 in whichthe hours memory circuit tracks the digital readout means and includesdivide by 12 counter means and one of 16 decoder means in which thedivide by 12 counter means receives a signal from the decade countermeans of the digital readout clock circuit.
 13. A solid state electroniccontrol as described in claim 12 in which the calendar circuit changesday indication each 24 hours including divide by 16 counter means, oneof 16 decoder means, multiple inverter means, multiple solid stateswitching means, and multiple pilot light indicator means in which thedivide by 16 counter means is connected to the second divide by sixmeans of the frequency division means, to the AM-PM indicator circuitflip flop means and to the base electrode of one of the two AM-PMindicator circuit transistors whose collector electrode is connected toone of the two pilot light indicator means whose function is to indicatePM, the one of 16 decoder means is connected to the divide by sixteencounter means and to the multiple inverter means, the multiple invertermeans is connected to the multiple solid state switching means, and themultiple solid state switching means is connected to the multiple pilotlight indicator means so that the divide by 16 counter means counts thepassage of 24 hours, and the binary coded output of the divide by 16counter means is decoded by the one of 16 decoder means and is invertedby the inverter means and fed to the solid state switching means whichactivate associated pilot light indicator means to indicate days of theweek.
 14. A solid state electronic control as described in claim 13 inwhich the calendar circuit divide by 16 counter is connected to thecalendar circuit one of 16 decoder, the one of 16 decoder is connectedbetween the divide by 16 counter and the inverter means, and themultiple solid state switching means are connected between the invertermeans and the pilot light indicator means.
 15. A solid state electroniccontrol as described in claim 14 including switch means connected to thedigital readout clock circuit frequency division means said switch meansbeing adjustable to pick up faster pulses allowing for rapid timesetting.
 16. A solid state electronic control as described in claim 15including data collection means for collecting data from the hoursmemory circuit, the calendar circuit, and the AM-PM indicator circuitand transmitting that data to the station output board.
 17. A solidstate electronic control as described in claim 16 in which the datacollection means is a three-input NOR gate.
 18. A solid state electroniccontrol as described in claim 17 including switching means between thethree-input NOR gate and each of its data inputs.
 19. A solid stateelectronic control as described in claim 17 in which the station outputboard includes trigger input means connected to the output of thethree-input NOR gate and a number of solid state sequential timersconnected to the trigger input means.
 20. A solid state electroniccontrol as described in claim 19 in which the trigger input means is aSchmitt trigger.
 21. A solid state electronic control as described inclaim 20 including rectifier means connected between the output from thethree-input NOR gate and the Schmitt trigger to prevent reverse flow ofcurrent.
 22. A solid state electronic control as described in claim 21including RC circuit means connected to each sequential timer andtrimmer resistor means connected between each sequential timer and itsrelated RC circuit to adjust the on time to compensate for tolerances inthe resistance and capacitance of their related RC circuits.
 23. A solidstate electronic control as described in claim 22 including multiplerelay switching transistor means and multiple relay means in wHich therelay switching transistor means are connected between the sequentialtimers and the coils of the relay means.
 24. A solid state electroniccontrol as described in claim 23 in which the external power outputcircuit includes an external power supply and in which the externalpower supply is connected to one set of the relay contacts.
 25. A solidstate electronic control as described in claim 24 including externalfield valves connected between the external power supply and other relaycontacts.
 26. A solid state electronic control as described in claim 25including switching means and solid state timer means in which theswitching means is adjustable to connect the solid state timer with aselected one of the solid state sequential timers to have saidsequential timer timed.
 27. A solid state electronic control asdescribed in claim 26 including a second switching means to apply powerto the timer and a third switching means to start the timer on timedelay.
 28. A solid state electronic control as described in claim 27including means for bypassing the output of the three-input NOR gate andtriggering the Schmitt trigger directly.
 29. A solid state electroniccontrol as described in claim 28 including retriggering means connectedto the first sequential timer and switch means connected between theretriggering means and the positive voltage whereby closing the switchmeans activates the retrigger means and the transfer pulse generated bythe shutdown of the first sequential timer will start the retrigger timedelay.
 30. A solid state electronic control as described in claim 29 inwhich the retriggering means is a solid state electronic timer.
 31. Asolid state electronic control as described in claim 29 including meansfor skipping selected alternate sequential timers.
 32. A solid stateelectronic control as described in claim 31 in which the means forskipping selected alternate sequential timers includes a solid stateflip flop, a number of NPN transistors, one connected to each sequentialtimer, and switching means connected between the flip flop and NPNtransistors.
 33. A solid state electronic control as described in claim32 including external modular timing boards to increase the capacity ofthe station output board by adding additional sequential timer stations,said external modular timing boards being connected to the means forskipping selected alternate sequential timers.
 34. A solid stateelectronic control as described in claim 25 including first switchingmeans, second switching means, and retrigger means in which the firstswitching means is adjustable to connect the retrigger means with aselected one of the solid state sequential timers to pick up triggerpulses from the selected sequential timer, the retrigger means isconnected between the first and the second switching means and thesecond switching means injects retrigger pulses into the selectedsequential timer.
 35. A solid state electronic control as described inclaim 34 including manual switch means connected to the second switchingmeans to start the output manually at any sequential timer station.